By
David L. Ruhberg
Microcomputer Systems Engineer
Motorola Semiconductor
Probably the slowest link in most computerized control systems is the display of information for human interpretation. The commonly used black and white monitor can display an adequate amount of information in most cases.
In applications where a large amount of information must be displayed in the same screen area, a color graphics system can easily provide this information by using a wide range of contrasting colors. Until recently the high cost of sophisticated components and color monitors required to generate and display color information has probably been the main prohibitive factor in development of these systems.
Recently the cost of components and color monitors has moderated to the point that using a color graphics system offers a viable solution to information display, ranging from the video games market to complex control systems.
A state-of-the-art color graphics system using the MC68000 16-bit microprocessor (MPU) with an economical MC6845 CRT controller (CRTC) is described in this application note. Hardware improvement is evident in data movement occurring in 16-bit words and multiply and divide commands while software compatibilities are greatly enhanced through the use of a processor that executes instructions which can operate on 8-, 16-, or 32-bit operands.
The general approach to a color graphics system is straightforward and almost identical to a black and white graphics system. A typical black and white graphics system is shown in Figure 1. The MPU has two responsibilities to the graphics system: first, to initially program the CRTC, and second, to transfer data to the display RAM.
Once the clock circuitry is running, the CRTC is initialized and the address lines to the display RAM begin incrementing sequentially. As this occurs, the appropriate data from the display RAM is loaded into the shift register and then gated out serially by the dot clock input to the shift register. The display monitor then interprets the data as either turning a particular pixel on or off.
FIGURE 1. Black and White Graphics System — Block Diagram
A color graphics system (Figure 2) uses the same principle as the black and white system except that it has to control three color guns (red, green, and blue) instead of just one. Therefore, there is an increase in the amount of hardware involved, but not in complexity. The software becomes more involved due to the fact that more information is being handled and displayed. The basic display system works on the principle that three bits (one for each color) controls each pixel instead of just one as in a black and white system. If two guns are on, the resulting color is a combination of the two. If all guns are on, white is the result. With this configuration a total of eight colors, including black and white, are available. Since the three bits needed to control a pixel do not fit into an eight-bit byte evenly, the unused bits could be used to obtain more colors or some other function. In addition, color systems usually require a separate sync input.
FIGURE 2. Color Graphics System — Block Diagram
The versatility of the internal architecture of the MC68000 (Figure 3) enhances the effectiveness of the color graphics system. Besides containing a 32-bit program counter yielding 16 megabytes of direct addressing range, the MC68000 also contains eight 32-bit data registers (D0-D7) and seven 32-bit address registers (A0-A6). The eight data registers are used for byte (8-bit), word (16-bit), and long word (32-bit) data operations. The seven address registers and the stack pointer may be used for word and long word address operations. In addition, all address and data registers may be used as index registers.
FIGURE 3. MC68000 Programming Model
This graphics system consists of two boards: a CPU board and a video board. The CPU board contains the processor, scratch-pad RAM, stack RAM, the program EPROM, and a terminal interface. The video board contains the CRTC, display RAM, multiplexers and buffers, parallel-to-serial shift registers, and the D/A drivers for the color display monitor.
An MC68000 Design Module (MEX68000KDM) is used as the CPU board. The resources available on the MC68000 Design Module allow more design time to be spent on the unique features of the system. The major portions of the system provided by the Design Module are the MPU (MC68000), the address decoding for the EPROM, a terminal interface, and all the software functions provided by the resident monitor (MACSbug). Included in the MACSbug is a transparent down-load feature which allows the system to communicate through the terminal to another system. The other system can provide the access to the floppy disks needed by this color graphics system for saving a full screen of data at a time.
The video board (Figure 4) contains more of the unique
hardware features of the color graphics system. The video
board can be separated into seven areas: the clock circuit,
CRT controller, the
FIGURE 4. Color Graphics System Schematic (Sheet 1 of 3)
FIGURE 4. Color Graphics System Schematic (Sheet 2 of 3)
FIGURE 4. Color Graphics System Schematic (Sheet 3 of 3)
U1-4 MC6880A/MC8T26A U5-8 MC6887/MC8T97 U9 MC6845 U10-U12 SN74LS158 U13-15 MC3459 U16 SN74LS138 U17, 23,110 SN74LS08 U18, 28 SN74LS30 U19, 24, 25, 111, 112 SN74LS74 U20 SN74LS195 U21, 27 SN74LS04 U22 SN74LS133 U23 SN74LS08 U24, 25 SN74LS74 U26 SN74LS195 U27 SN74LS04 U28 SN74LS30 U29 SN74LS05 U30-U37 SN74LS245 10 MHz Oscillator U38-U101 MCM2147 Q1-Q3 2N3904 U102-U109 SN74LS165 Q4-Q7 2N5336 U110 SN74LS08 R1-R4 1k U111, U112 SN74LS74 R5-R9 10k U113 SN74LS86 R10-R13 (Variable) 10K U114 SN74LS175 U115 SN74LS32 S1 5-Position Switch
The clock circuit generates the five timing signals used
throughout the video board; they are: a dot clock, a CRTC
clock, a 2× dot clock, a shift register load, and a Φ2 signal.
The dot clock is used to drive the serial shift registers. The
CRTC clock is used to drive the CRTC. The 2× dot clock
and the shift register load are gated together to generate the
parallel load (
FIGURE 5. Clock Circuitry Timing Signals
The MC6845 CRT controller (CRTC) is a programmable
controller used to prepare the information in the display
RAM for use by a video display monitor. The CRTC
generates the signals required to provide data at the appropriate times.
Since the length and period between these
signals varies from system to system, the CRTC is designed
to be programmed by an MPU. In this system the internal
registers are accessible synchronously through hex ($) address
locations $1FFFD and $1FFFF. After programming, the
CRTC provides the addresses, horizontal and vertical sync
signals, and the display enable signal to the display system.
The addresses, out put by the CRTC in conjunction with the
parallel chip select (
The
The multiplexers and buffers are used to feed the various control signals to the rest of the system. Multiplexers U10, U11, and U12 determine which address bus will access the display RAM. When the control signal is high, the MC68000 has access to the RAM and when low, the CRTC has access. Buffers U13, U14, and U15 are used to drive the large number of devices on the address bus. Data buffers U30-U37 are used to isolate the four banks of RAM from each other. Buffers are also used for almost all the signals coming onto the video board. These board buffers interface with the modified EXORciser bus which the Design Module uses. This bus has only sixteen address lines coming from the Design Module, so address line A17 must be run separately to keep the display RAM from being accessed at the same time MACSbug or the controller program is accessed (addresses $20000 and $22000).
The display RAM is organized into four banks (red, green, blue, and luminance). However, the address lines are configured so that consecutive words are located in consecutive banks of RAM. This was done to allow the programmer to visualize accessing one 16-bit wide bank at a time instead of accessing red, green, blue, and luminance banks all at the same time. The memories used are 4K×1 static RAMs (MCM2147) which simplify some of the chip select circuitry. Dynamic RAMs could be used and should definitely be considered in a production system since they lower the hardware cost as well as power consumption. They were omitted in this application to simplify the system configuration. It should be noted that the CRTC keeps incrementing its address lines during horizontal and vertical retrace to keep the dynamic RAM refreshed. The speed of the static memories is not critical due to the presence of the speed selection switch explained earlier. As far as the CRTC and the serial shift registers are concerned, the memory looks like one 4K×64-bit bank of RAM.
Shift registers U102-U109 consist of eight 8-bit, parallel-load, serial shift registers. They are configured to look like four 16-bit shift registers, one for each of the color guns and one for luminance. With the RAM and shift registers configured in this fashion, the RAM is accessed only 25 percent of the time. This means that the RAM has four times the amount of setup time and slower RAM can be used. The dot clock then clocks the data out to be gated with display enable.
Conversion from digital to analog voltages in this system is needed because a luminance bit is used to obtain more colors than are possible with the three guns digitally. The luminance bit is used to indicate half luminance when set and full luminance when clear. When all guns are off, the screen is black and the state of the luminance bit has no effect. Since the color display monitor uses an analog input on each gun, any number of colors may be obtained if the supporting hardware is provided. The D/A conversion used in this system was done to save space. A cleaner method would be to use special D/A converters and special line drivers for this function.
The software included to exercise this system consists of five basic commands:
CM — Clear Memory BX — Box Draw Q8 — Random Line ED — Edit BA) Provides the capability of saving (BA) a screen on SH) floppy disk and calling (SH) it back.
The clear memory (CM) command clears the screen. The box drawing (BX) command draws continuously concentric boxes which close in on each other. This gives the effect of running up a hallway.
The random line (Q8) drawing command picks random points and connects them together until they form a multisided polygon and then it continues to repeat that shape, all the while collapsing in on itself and changing colors. A scaling function has been implemented to keep the figure occupying a major portion of the screen.
The edit (ED) command allows the user to draw figures on the screen using the cursor controls on the terminal and allows a choice of colors.
The BA command is used to store a screen full of data on floppy disk while the SH command is used to call it from the floppy disk and display it on the screen.
Each of the routines which write to the display RAM use the basic data layout for every pixel on the screen. Each pixel is controlled by four bits. Each bit corresponds to either luminance, blue, green, or red, as shown in Figure 6.
FIGURE 6. Pixel Control Bit — Layout
A memory map for this application is given in Figure 7. A listing of the software is given at the end of this application note.
The resolution of the display in this application is 256 × 256 pixels. The density could be doubled in both directions to 512 × 512 by quadrupling the memory. This can be easily done if dynamic RAM is used since 4K × 1 and 16K × 1 dynamic RAM can be arranged in the same basic configurations. As space was one of the design criteria in this application, some of the more straightforward approaches were not taken.
